Module
Instruction Set Architecture (ISA)
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About
The hardware/software contract: instruction formats, addressing modes, register vs. memory architectures, RISC vs. CISC tradeoffs, and calling conventions. Grounded in a RISC-V or MIPS-like teaching ISA commonly used in undergrad courses.
Goal
Read and write assembly for a RISC ISA; encode/decode instructions; explain how high-level constructs (if/while, procedure calls, arrays) lower to ISA operations; compare ISA design choices and their performance/complexity implications.
Prerequisites
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